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40
4431E–8051–04/06
AT/TS8xC54/8X2
The encryption array cannot be directly verified. Verification of the encryption array is done by
observing that the code array is well encrypted.
Figure 17-2. Programming and Verification Signal’s Waveform
17.4
EPROM Erasure (Windowed Packages Only)
Erasing the EPROM erases the code array, the encryption array and the lock bits returning the
parts to full functionality.
Erasure leaves all the EPROM cells in a 1’s state (FF).
17.4.1
Erasure Characteristics
The recommended erasure procedure is exposure to ultraviolet light (at 2537 ) to an integrated
dose at least 15 W-sec/cm
2. Exposing the EPROM to an ultraviolet lamp of 12,000
μW/cm2 rat-
ing for 30 minutes, at a distance of about 25 mm, should be sufficient. An exposure of 1 hour is
recommended with most of standard erasers.
Erasure of the EPROM begins to occur when the chip is exposed to light with wavelength
shorter than approximately 4,000 . Since sunlight and fluorescent lighting have wavelengths in
this range, exposure to these light sources over an extended time (about 1 week in sunlight, or 3
years in room-level fluorescent lighting) could cause inadvertent erasure. If an application sub-
jects the device to this type of exposure, it is suggested that an opaque label be placed over the
window.
18. Signature Bytes
The TS87C54/58X2 has four signature bytes in location 30h, 31h, 60h and 61h. To read these
bytes follow the procedure for EPROM verify but activate the control lines provided in Table 31.
for Read Signature Bytes. Table 18-1. shows the content of the signature byte for the
TS80C54/58X2.
Co n t r o l
signals
Data In
ALE/PROG
A0-A12
Programming Cycle
100
μs
D0-D7
EA/VPP
Data Out
Read/Verify Cycle
12.75V
5V
0V
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